Electronics Engineer,ECE Interview Questions
1.What is D-FF?
2.What is the basic difference between Latches and Flip flops?
3.What is a multiplexer?
4.How can you convert an SR Flip-flop to a JK Flip-flop?
5.How can you convert an JK Flip-flop to a D Flip-flop?
6.What is Race-around problem? How can you rectify it?
7.Which semiconductor device is used as a voltage regulator and why?
8.Explain an ideal voltage source?
9.Explain zener breakdown and avalanche breakdown?
10.What are the different types of filters?
11.What is the need of filtering ideal response of filters and actual response of filters?
12.What is sampling theorem?
13.What is impulse response?
14.Explain the advantages and disadvantages of FIR filters compared to IIR counterparts.
15.What is CMRR?
16.Explain half-duplex and full-duplex communication?
17.Which range of signals is used for terrestrial transmission?
18.Why is there need for modulation?
19.Which type of modulation is used in TV transmission?
20.Why we use vestigial side band (VSB-C3F) transmission for picture?
21.When transmitting digital signals is it necessary to transmit some harmonics in addition to fundamental frequency?
22.For asynchronous transmission, is it necessary to supply some synchronizing pulses additionally or to supply or to supply start and stop bit?
23.BPFSK is more efficient than BFSK in presence of noise. Why?
24.What is meant by pre-emphasis and de-emphasis?
25.Explain 3 dB cutoff frequency? Why is it 3 dB, not 1 dB?
26.Explain ASCII, EBCDIC?
Showing posts with label ece faqs. Show all posts
Showing posts with label ece faqs. Show all posts
Electronics interview questions
1. What is the difference between a latch and a flip flop. For the same input, how would the output look for a latch and for a flip-flop.
2. Finite state machines:
(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.
(2.2). To detect the sequence "abca" when the inputs can be a b c d.
3. minimize a boolean expression.
4. Draw transistor level nand gate.
5. Draw the cross-section of a CMOS inverter.
6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.
7. Given a boolean expression he asked me to implement just with muxes but nothing else.
8. Draw Id Vds curves for mosfets and explain different regions.
9. Given the transfer characteristics of a black box draw the circuit for the black box.
10. Given a circuit and its inputs draw the outputs exact to the timing.
11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.
12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 13. Some problems on clamping diodes.
2. Finite state machines:
(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.
(2.2). To detect the sequence "abca" when the inputs can be a b c d.
3. minimize a boolean expression.
4. Draw transistor level nand gate.
5. Draw the cross-section of a CMOS inverter.
6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.
7. Given a boolean expression he asked me to implement just with muxes but nothing else.
8. Draw Id Vds curves for mosfets and explain different regions.
9. Given the transfer characteristics of a black box draw the circuit for the black box.
10. Given a circuit and its inputs draw the outputs exact to the timing.
11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.
12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 13. Some problems on clamping diodes.
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