Cisco Interview questions for Electronics Engineer

Cisco Interview questions for Electronics Engineer
1. In order to find out stack fault of a three input nand gate how many necessary input vectors are needed ?
2. What is parity generation ?
3. A nand gate becomes ___ gate when used with negative logic ?
4. What is the advantage of cmos over nmos ?
5. What is the advantage of syncronous circuits over asynchronous circuits ?
6. What is the function of ALE in 8085 ?
7. A voice signal sample is stored as one byte. Frequency range is 16 Hz to 20 Hz. What is the memorysize required to store 4 minutes voice signal?
8. What will the controller do before interrupting CPU?
9. In a normalised floating point representation, mantissa is represented using 24 bits and exponent with 8 bits using signed representation. What is range ?
10. The stack uses which policy out of the following-- LIFO, FIFO, Round Robin or none of these ?
11. Where will be the actual address of the subroutine is placed for vectored interrupts?
12. Give the equivalent Gray code reprasentation of AC2H.
13.What is the memory space required if two unsigned 8 bit numbers are multiplied ?
14. The vector address of RST 7.5 in 8085 processor is _______.
Ans. 003C (multiply 7.5 by 8 and convert to hex)
15. Subtract the following hexadecimal numbers--- 8416 - 2A16
16. Add the following BCD numbers--- 1001 and 0100
17. How much time does a serial link of 64 Kbps take to transmit a picture with 540 pixels.
18. Give the output when the input of a D-flip flop is tied to the output through the XOR gate.
19. Simplify the expression AB + A( B + C ) + B ( B + C )
20. Determine the logic gate to implement the foolowing terms--ABC, A+B+C
21. Implement the NOR gate as an inverter.
22. What is the effect of temperature on the Icb in a transistor
23. What is the bit storage capacity of a ROM with a 512*4 organisation?
24. What is the reason of the refresh operation in dynamic RAM's ?
25. Suppose that the D input of a flip flop changes from low to high in the middle of a clock pulse.Describe what happens if the flip flop is a positive edge triggered type?
26. How many flip flops are required to produce a divide by 32
device ?
27. An active HIGH input S-R latch has a 1 on the S input and a 0 on the R input. What state is the latch in?
28. Implement the logic equation Y = C^BA^ + CB^A + CBA with a multiplexer. (where C^ stands for C complement)
29.Equivalent Gray code reprasentation of AC2H.
30. What does a PLL consist of ?

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