VLSI Interview Questions
What is polymorphism?
Explain how MOSFET works?
What is the purpose of a processor cache?
What is LVS, DRC?
Explain how a MOSFET works?
What is body effect?
What is a D-latch?
Explain ASIC Design Flow?
What is hold time?
Why is Extraction performed?
What is charge sharing?
Write the VHDL Code for D-latch?
What is FPGA?
What is validation?
What's the price in 1K quantity?
What is setup time?
Why do we use a Clock tree?
What is Cross Talk?
How about voltage source?
How can you model a SRAM at RTL Level?
What are the ways to optimize the performance of
What is latch up?
What is SPICE?
What is clock feed through?
How do you size NMOS and PMOS transistors
What are the limitations in increasing the power
What work have you done on full chip Clock
Explain the working of 4-bit Up/down Counter?
What are the differences between netlist of HSPICE
Explain the working of differential sense amplifier?
How BJT works?
What is the critical path in a SRAM?
How do you detect if two 8-bit signals are same?
What is a linked list?
Define threshold voltage?
What is Fowler-Nordheim Tunneling?
Give the expression for CMOS switching power dissipation?
Explain CMOS Inverter transfer characteristics?
What are the differences between DRAM and SRAM?
What is component binding?
Which gate is normally preferred while implementing
What is the ideal input and output resistance
What happens to delay if you increase load capacitance?
How does Resistance of the metal lines vary
What are the differences between D-Latch and D flip-flop?
What is the build-in potential?
What happens to delay if we include a resistance
Explain the difference between write through
What is pipelining and how can we increase
Explain Custom Design Flow?
Explain Clock Skew?
Explain the concept of a Clock Divider Circuit?
How many bit combinations are there in a byte?
What is the doping?
What’s the difference between Testing & Verification?
How to find the read failure probability in SRAM?
Explain the operation of a 6T-SRAM cell?
What is hot electron effect?
What are the differences between Array and Booth
What is the depletion region?
Why don’t we use just one NMOS or PMOS
What are set up time & hold time constraints?
Write a VHDL Code for a D flip-flop?
Explain about stuck at fault models, scan design,
What is the purpose of a processor cache and
What is Fermi level?
Give the expression for calculating Delay in CMOS circuit?
Explain sizing of the inverter?
What is interrupt latency?
What are the differences between Signals and
What are the main issues associated with multiprocessor
How does a Band gap Voltage reference work?
What are the different limitations in increasing
What happens if we increase the number of contacts
What types of CMOS memories have you designed?
What are advantages and disadvantages of Mealy and Moore?
What are factors affecting Power Consumption on a chip?
What is the difference between = and == in C?
What is Channel length modulation?
What is Noise Margin? Explain the procedure to
What happens if we use an Inverter instead of the
Explain the usage of the shared SPI bus?
Explain various adders and diff between them?
What are the differences between IRSIM and SPICE?
Explain the Various steps in Synthesis?
Explain the operation considering a two processor
What are the two types of noise of MOSFET
Explain the sizing of the inverter?
Explain the Charge Sharing problem while
What are the main issues associated with
Write a pseudo code for sorting the numbers in an array?
What are the differences between functions and
Who provides the DRC rules?
What is the most complicated/valuable program
What is conductance and valence band?
What is short Channel effect?
Describe the various effects of scaling?
What happens if we delay the enabling of Clock signal?
Which metal layers would you prefer for Word
What types of high speed CMOS circuits have you designed?
How can you construct both PMOS and NMOS
What are the differences between blocking and blocked